Rambus reported record quarterly revenue of $207.4 million for the second quarter of 2026, a 20% increase from a year earlier, with record product revenue of $99.2 million. The figures matter less as a broad measure of semiconductor demand than as a focused indication of spending on two persistent constraints in AI systems: feeding processors and accelerators with data, and moving that data efficiently between components.
The company’s results for the quarter ended June 30 underline how its mix of memory-interface chips, silicon intellectual property (IP) and licensing can benefit as server platforms adopt faster memory and more capable I/O fabrics. But they also show why Rambus should not be treated as a direct proxy for AI-server shipments. Its revenue includes royalties and contract-related income alongside product sales, while the commercial payoff from new IP products depends on customers’ chip-development cycles and eventual production ramps.
A record driven by products, royalties and contracts
Product revenue rose 22% year on year and 13% sequentially to $99.2 million. Royalties brought in $84.2 million, while contract and other revenue was $24.0 million. That composition is important: the quarter was not solely a story of shipments of physical chips. Nevertheless, product revenue was the largest individual component and the company’s fastest-growing major line relative to a year earlier.
On a GAAP basis, Rambus generated net income of $67.6 million, or $0.61 per diluted share, and produced $61.2 million of cash from operations. It ended June with $824.9 million in cash, cash equivalents and marketable securities. Those figures provide financial capacity for continued product development, which is essential in markets where interface technologies must be designed well ahead of the server platforms in which they will be deployed.
Management’s third-quarter outlook points to continued momentum, but also a changing revenue mix. Rambus forecast total revenue of $210 million to $216 million and product revenue of $110 million to $116 million. At the midpoint, total revenue would grow only modestly from the second quarter, while product revenue would rise more sharply. The range also implies lower royalty revenue than in the June quarter, illustrating the value of separating recurring licensing-related income from the company’s hardware business when assessing quarterly performance.
DDR5-9600 targets the server-memory bottleneck
The most tangible hardware development is Rambus’s DDR5-9600 server RDIMM chipset, announced on July 8. Rather than manufacturing DRAM itself, Rambus supplies the supporting components that allow a registered memory module to operate reliably at higher speeds. The DDR5-9600 offering includes a sixth-generation registering clock driver, the PMIC5030 power-management IC, an SPD hub and temperature-sensing components.
These parts address practical engineering requirements that become more severe as memory data rates rise. The clock driver distributes timing signals across the module; the PMIC manages power delivery; and the SPD hub and thermal components support configuration and monitoring. In effect, the chipset sits between the server’s memory controller and the DRAM devices, helping module makers bring faster designs to market.
For AI infrastructure, faster main memory does not replace high-bandwidth memory attached closely to accelerators. It serves a different part of the system. CPU-based servers, control-plane machines, storage nodes and data-preparation systems still require substantial capacity, sustained bandwidth and predictable operation. Higher-speed RDIMMs can therefore be relevant to AI deployments even where GPUs or other accelerators remain the most visible hardware investment.
Rambus also highlighted chipsets for DDR5-9600 client modules. That broadens the addressable market beyond servers, although the near-term strategic emphasis remains data-centre infrastructure. The significance of the DDR5 portfolio is not simply a higher headline data rate: it is Rambus’s effort to sell a coordinated set of components rather than a single interface chip, which could increase the value captured per memory module.
PCIe 7 IP is an earlier-stage opportunity
Rambus’s PCIe 7.0 switch IP with time-division multiplexing is a different kind of product. It is licensable design IP for customers building ASICs or FPGAs, not a discrete switch card sold into a data centre. The technology is intended to help system designers schedule traffic over shared PCIe links more efficiently in AI, cloud and high-performance computing designs.
PCIe 7.0 is a forward-looking standard: its 128 GT/s raw data rate doubles PCIe 6.x, with a x16 configuration designed to provide up to 512 GB/s of bidirectional bandwidth. This makes the standard relevant to architectures that must connect accelerators, CPUs, storage and networking resources at increasing scale. Rambus’s use of time-division multiplexing is aimed at improving link utilisation and offering more deterministic traffic management in those systems.
The opportunity is real, but it is not equivalent to immediate end-market revenue. IP must be selected, integrated, taped out, validated and incorporated into a customer’s product before a material production ramp can occur. Consequently, the PCIe 7 launch is better read as a positioning move for the next generation of AI and data-centre silicon than as evidence of present-day switch demand.
What the quarter signals—and what it does not
The second-quarter performance supports the view that AI infrastructure spending is reaching beyond accelerators into memory subsystems and interconnect design. Rambus is exposed to that shift through specialised components and IP that can be used by module makers and chip designers rather than by cloud operators directly.
Its record product revenue and positive third-quarter product outlook strengthen that argument. Yet the company still faces the normal risks of semiconductor platform transitions: customers may delay qualifications, competitors may pressure pricing, and licensing or contract revenue can move differently from chip shipments. New DDR5 and PCIe 7 offerings also require adoption by ecosystem partners before their full commercial effect is visible.
For now, Rambus’s results offer a useful signal from a less conspicuous layer of the AI hardware stack. The market’s need is not only for more compute, but also for memory modules and interconnects capable of keeping complex systems supplied with data. Rambus’s quarter suggests that this supporting layer is becoming an increasingly meaningful source of semiconductor demand.
