Hardware
Rapidus Eyes Eight-Reticle AI Packaging by 2030
Rapidus’s plan to manufacture eight-reticle interposers on 600 mm glass panels is a high-risk attempt to make the largest AI-class chiplet packages more economical by 2030.
Tag
packaging
5 published articles
Packaging in semiconductor manufacturing is the process of enclosing and connecting a chip so it can operate reliably within an electronic system. It provides mechanical protection, power delivery, heat dissipation and electrical links to circuit boards or other chips. Advanced packaging can combine multiple dies, memory and interconnects in compact, high-performance assemblies.
Hardware
HBM Shipments Put Focus on Intel’s Malaysia Ramp
A reported rise in high-bandwidth-memory shipments to Malaysia is consistent with Intel preparing to expand advanced packaging in Penang, but the available trade signals do not establish that Project Pelican is the destination.
Hardware
TSMC Reports 98% Yield for 5.5-Reticle CoWoS-L
TSMC’s reported yield above 98% for its 5.5-reticle CoWoS-L packaging signals that exceptionally large AI packages are becoming manufacturable at scale, although the company’s longer-term roadmap still carries substantial execution risk.
Hardware
SK hynix 3D DRAM Plans Target On-Device AI
SK hynix is pursuing a 3D DRAM-on-logic architecture for future on-device AI, but this should not be confused with TSMC’s separately reported WMCM packaging approach.
Hardware
TSMC Expands Packaging Strategy as Intel EMIB Gains Ground
TSMC’s public roadmap shows a broad push to scale advanced packaging, but it has not formally announced a direct replica of Intel’s embedded-bridge technology.