Rapidus Eyes Eight-Reticle AI Packaging by 2030
Rapidus’s plan to manufacture eight-reticle interposers on 600 mm glass panels is a high-risk attempt to make the largest AI-class chiplet packages more economical by 2030.

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Behind every app there is silicon, cooling and a supply chain. We map processors, chips, semiconductors and devices from phones to data centres. We track performance, energy use and the geopolitics of chip manufacturing. Technical analysis is translated into plain language, without marketing spin.
Rapidus’s plan to manufacture eight-reticle interposers on 600 mm glass panels is a high-risk attempt to make the largest AI-class chiplet packages more economical by 2030.
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